Knowledge Based Evolutionary Programming for Inductive Learning in First-Order Logic

We present results from the application of a new methodology based on Parallel and Distributed Genetic Programming (PADGP). It allows us to automatically perform the placement and routing of circuits on reconfigurable hardware. For each of the problems we have dealt with, the methodology finds several different solutions. 1 DESIGN BASED ON FPGAS Field Programmable gate arrays (FPGAs) are powerful devices for implementing complex digital systems. FPGAs are arrays of prefabricated logic blocks and wire segments with user-programmable logic and routing resources. When programming an FPGA, we previously obtain a circuit description via logic synthesis. We take this description and we map and convert it into the modules and routing resources available in FPGAs. Bearing in mind that both logic blocks and routing resources are predefined in an FPGA chip, circuits must be laid out within it.